JEDEC JESD 212
GDDR5 SGRAM
standard by JEDEC Solid State Technology Association, 09/01/2009
GDDR5 SGRAM
standard by JEDEC Solid State Technology Association, 09/01/2009
TERMS, DEFINITIONS, AND LETTER SYMBOLS FOR DISCRETE SEMICONDUCTOR AND OPTOELECTRONIC DEVICES
standard by JEDEC Solid State Technology Association, 10/01/2009
DDR3 SDRAM STANDARD
standard by JEDEC Solid State Technology Association, 07/01/2010
DOUBLE DATA RATE (DDR) SDRAM SPECIFICATION
standard by JEDEC Solid State Technology Association, 02/01/2008
FULLY BUFFERED DIMM DESIGN FOR TEST, DESIGN FOR VALIDATION (DFx)
standard by JEDEC Solid State Technology Association, 07/01/2008
DEFINITION OF THE SSTE32882 REGISTERING CLOCK DRIVER WITH PARITY AND QUAD CHIP SELECTS FOR DDR3/DDR3L/DDR3U RDIMM 1.5 V/1.35 V/1.25 V APPLICATIONS
standard by JEDEC Solid State Technology Association, 12/01/2010
DICTIONARY OF TERMS FOR SOLID STATE TECHNOLOGY, FOURTH EDITION
standard by JEDEC Solid State Technology Association, 07/01/2007
LOW FREQUENCY POWER TRANSISTORS
standard by JEDEC Solid State Technology Association, 01/01/1976
STANDARD FOR DESCRIPTION OF 54/74ACXXXXX AND 54/74ACTXXXXX ADVANCED HIGH-SPEED CMOS DEVICES
standard by JEDEC Solid State Technology Association, 09/01/1990
SERIAL INTERFACE FOR DATA CONVERTERS
standard by JEDEC Solid State Technology Association, 04/01/2008